Further, the outputs of this system is verified using Modelsim. In this chapter, these steps are discussed and a system is designed which displays the message on the computer and blinks one LED using FPGA board. 12.1, various steps are shown to design the SoPC system on the FPGA board using Nios-II processor. Nios II is a 32-bit embedded-processor architecture designed for Altera-FPGA board. we can design the embedded systems using Verilog/VHDL codes and implement them on the FPGA board. Further, SoPC systems are the programmable embedded systems i.e. Since, embedded systems are designed for specific tasks, therefore the designs can be optimized based on the applications. The Embedded systems are cost effective solution for such cases, where only few functionalities are required in the system. timers settings, displays and buzzers in microwave-ovens or washing machines etc., is not a cost effective choice. Selection of these computer systems for few specific applications, e.g. personal computers (PCs), support various end user applications. Before beginning the SoPC design, let’s understand the difference between ‘computer system’, ‘embedded system’ and ‘SoPC system’. In this tutorial, we will learn to design embedded system on FPGA board using Nios-II processor, which is often known as ‘System on Programmable chip (SoPC)’. Load the Quartus design (i.e.sof/.pof file) Modify BSP (required for using onchip memory)
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